job description
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Hardware Security PhD Position Project Description Public key cryptography is vulnerable to mathematical attacks by quantum computers. Governments are encouraging organizations to adopt new post-quantum cryptographic algorithms to secure critical infrastructure. However, these new algorithms remain vulnerable to physical attacks, while the current test infrastructure used to evaluate their resistance to physical attacks sacrifices quality for uptime. This project investigates new methods inspired by genomics (to improve quality) in combination with digital hardware design (to reduce runtime) to thoroughly evaluate the security of post-quantum protection implementations against deep learning-based side-channel analysis. We invite applications for a PhD position in the Computer Architecture for Embedded Systems group. We are looking for a talented and motivated candidate to participate in the program and conduct research at the intersection of hardware security (especially side-channel analysis) and FPGA design.
offer requirements
Your CV You are an enthusiastic and motivated researcher. Hold a Master’s degree in a related discipline such as Computer Engineering, Embedded Systems or Computer Science. Proficient in C, C++ and Python (preferably in a Linux environment). Master-level knowledge of hardware security (especially side channel analysis) and familiarity with statistical tools for successful execution of attacks. Master-level knowledge of FPGA/hardware design using hardware description languages and/or high-level synthesis (VHDL, Verilog, Vitis HLS, Vitis), and FPGA board programming experience. Basic knowledge and experience in parallel programming. Basic understanding of deep learning methods is preferred English proficiency.
offer benefits/salary
Our offer As a PhD student at UT, you will receive four years of full-time training, with the first year being a qualification, in a very stimulating and exciting research environment. The University offers a vibrant ecosystem of enthusiastic colleagues. Your salary and related conditions are in accordance with the Collective Labor Agreement for Dutch Universities (CAO-NU). The total monthly salary ranges from €2,901 (first year) to €3,707 (fourth year); benefits are generous and include a vacation allowance of 8% of your annual salary, a year-end bonus of 8.3%, and a solid pension plan. Free use of sports facilities on campus. Family-friendly school with parental leave (paid and unpaid); As part of the Tunt Graduate School, you will have a training program in which you and your supervisor will determine an appropriate educational and supervisory plan. We encourage a high degree of responsibility and independence while working with close colleagues, researchers and other staff.